BLACKSBURG, VA. -- A software program developed at Virginia Tech that could allow manufacturers to test the reliability of computer chips in a dramatically reduced amount of time before they are made may give the U.S. a new competitive edge in the world microelectronics industry.
The test is designed to work with a computer language developed by the Department of Defense that was written to allow companies to exchange computerized information on microchips by using a common set of codes.
The language, called the VHSIC Hardware Description Language (VHDL), is specifically geared to the development of high-power microchips, and its use is increasing.
Testing is one of the most expensive steps in building a large scale integrated chip, according to James Armstrong, a Virginia Tech electrical engineering professor who participated in a five-year project to develop VHDL. "If a microchip cannot be tested, then it cannot be built," he said.
Armstrong, an expert in the language who recognized it could be used to generate tests that would be more efficient than ones currently being produced, said the software "represents a great improvement in fault modeling research" because engineers are able to develop a sequence of tests in less time.
"Instead of months, developing the tests should take only a few days," he said.
The computer test program has been tried successfully on small chips and researchers hope to soon try the software on larger chips, according to Armstrong.
Traditional computer chip testing takes so long because each of the logic "gates" in a chip is tested individually, and today's microchips may contain thousands of gates.
The new software program, developed by a study group formed by Armstrong and a colleague, F.G. Gray, models the effects that a single fault has on the major functions of a chip, instead of modeling faults on single wire